Research graph
References from Tune-Up Friendly Fast Simulated Annealer for VLSI Analog Module Placement. Local targets link to admitted publications; unresolved targets remain external evidence.
10.1007/978-1-4757-4501-6
10.1007/978-1-4757-4501-6 · External reference
10.1002/9780470050118.ecse312
10.1002/9780470050118.ecse312 · External reference
10.1007/978-1-4615-2756-5
10.1007/978-1-4615-2756-5 · External reference
10.1109/date.2005.59
10.1109/date.2005.59 · External reference
10.1007/978-1-4020-6627-6
10.1007/978-1-4020-6627-6 · External reference
Unresolved reference
External reference
