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References from Research on the co-design technology of layout-level drift region scaling and segmented field plate engineering for LDMOS. Local targets link to admitted publications; unresolved targets remain external evidence.
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10.19304/j.issn1000-7180.2023.0986
10.19304/j.issn1000-7180.2023.0986 · 2025 · External reference
10.19304/j.issn1000-7180.2023.0986
10.19304/j.issn1000-7180.2023.0986 · 2025 · External reference
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10.1109/led.2018.2854417
10.1109/led.2018.2854417 · 2018 · External reference
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10.1109/ted.2025.3603791
10.1109/ted.2025.3603791 · 2025 · External reference
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