Abstract
Wearable bioimpedance spectroscopy within Internet of Medical Things ecosystems requires energy-efficient analog front-ends (AFEs) capable of processing small impedance-dependent signals over a wide excitation-frequency range. This paper presents a preliminary study of an automated gm/ID-based framework for the co-design of wideband CMOS instrumentation amplifiers, jointly considering power, noise, bandwidth, and frequency-dependent common-mode rejection. The proposed flow combines technology-characterized device data, Verilog-A behavioral modeling, Python-based optimization, and SKILL-assisted transistor-level verification. The methodology is applied to a wideband CMOS current-feedback instrumentation amplifier (CFIA) designed in a 180-nm CMOS technology. Operating from a 1.8-V supply, the amplifier provides a nominal gain of 30 V/V over the 1-kHz to 2-MHz signal band. Particular attention is given to the coupling between transistor sizing, parasitic capacitance, and high-frequency CMRR in a local current-feedback topology. The paper establishes the BIS readout requirements, describes the selected CFIA architecture, and formulates the main design variables and optimization targets. The presented results constitute the initial stage of a broader design framework; complete optimization, statistical robustness, and experimental validation are reserved for the subsequent full study.